Memory device with a selection element and a control line in a substantially similar layer
US7391064B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2004 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Feb 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B99/16
Abstract
The invention facilitates manufacture of semiconductor memory components by reducing the number of layers required to implement a semiconductor memory device. The invention provides for a selection element to be formed in the same layer as one of the control lines (e.g. one of the wordline and bitline). In one embodiment of the invention, a diode is implemented as the selection element within the same layer as one of the control lines. Production of the selection element within the same layer as one of the wordline and bitline reduces problems associated with vertical stacking, increases device yield and reduces related production costs. The invention also provides an efficient method of producing memory devices with the selection element in the same layer as one of the control lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.