Method for real time monitoring and verifying optical proximity correction model and method
US7392502B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2005 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Sep 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70683
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
This invention relates to a method for real time monitoring and verifying optical proximity correction (OPC) models and methods in production. Prior to OPC is performed on the integrated circuit layout, a model describing the optical, physical and chemical processes involving lithography should be obtained accurately and precisely. In general, the model is calibrated using the measurements obtained by running wafers through the same lithography, patterning, and etch processes. In this invention, a novel real time method for verifying and monitoring the calibrated model on a production or monitor wafer is presented: optical proximity corrected (OPC-ed) test and verification structures are placed on scribe lines or cut lines of the production or monitor wafer, and with pre-determined schedule, the critical dimensions and images of these test and verification structures are monitored across wafer and across exposure field.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.