Semiconductor package
US7394147B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2005 |
| Grant date | Jul 1, 2008 |
| Priority date | — |
| Expiry date | Dec 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a substrate, a first chip, a nonconductive adhesive, a second chip and a plurality of supporting balls. The first chip has an upper surface and a lower surface opposite to the upper surface, and the lower surface is mounted on the substrate. The nonconductive adhesive is disposed on the upper surface of the first chip. The second chip has an upper surface and a lower surface opposite to the upper surface, wherein the lower surface is mounted on the upper surface of the first chip by means of the nonconductive adhesive, and the adherent area between the nonconductive adhesive and the second chip is larger than 90% of the area of the lower surface of the second chip. The supporting balls are disposed in the nonconductive adhesive for supporting the second chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.