Circuit for driving bus
US7394285B2 · kind B2 · utility
2Cited by
8References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2006 |
| Grant date | Jul 1, 2008 |
| Priority date | — |
| Expiry date | Sep 5, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bus driving circuit includes a majority voter unit for comparing the number of logic high level bits with the number of logic low level bits among a predetermined number of bits of data; a latch unit for latching a first output signal in response to the compared result; and a flip-flop unit for latching the predetermined number of bits of data in synchronization with the clock; and a selection unit for selecting one of the latched data of the flip-flop unit and an inverted output of the latched data of the flip-flop unit according to the first output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.