Solid state magnetic memory system and method
US7394683B2 · kind B2 · utility
6Cited by
13References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2004 |
| Grant date | Jul 1, 2008 |
| Priority date | — |
| Expiry date | Nov 10, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A solid state magnetic memory system and method disposes an array of magnetic media cells in an array on a substrate. In an exemplary embodiment, drive electronics are fabricated into the substrate through conventional CMOS processing in alignment with associated cells of the array. The magnetic media cells each include a magnetic media bit and a magnetoresistive or GMR stack for reading the state of the media bit. Addressing lines are juxtaposed with the media bits to permit programming and erasing of selected ones of the bits. In at least some embodiments, sector erase may be performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.