Prefetch miss indicator for cache coherence directory misses on external caches
US7395375B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2004 |
| Grant date | Jul 1, 2008 |
| Priority date | — |
| Expiry date | Oct 12, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system, method and article of manufacture for reducing latencies associated with cache coherence directory misses on external caches in a shared distributed memory data processing system. A cache coherence directory is evaluated for possible prefetching of a directory entry into a directory cache. A prefetch miss indicator is set if the prefetch evaluation results in a directory miss. The prefetch miss indicator is consulted during subsequent processing of a memory block request corresponding to the directory entry. An accelerated snoop response action is taken if the prefetch miss indicator is set. The latency of a second lookup into the cache coherence directory, which would otherwise be required, is thereby avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.