Integrated circuit devices including an L-shaped depletion barrier layer adjacent opposite sides of a gate pattern and methods of forming the same
US7396730B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 2004 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | Jul 24, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/371
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit devices include an integrated circuit substrate having a channel region therein. A gate pattern is disposed on a top surface of the channel region. A depletion barrier layer covers a surface of the integrated circuit substrate adjacent opposite sides of the gate pattern and extending along a portion of a lateral face of the channel region. A source/drain layer is disposed on the depletion barrier layer and electrically contacting the lateral face of the channel region in a region not covered by the depletion barrier layer. The channel region may protrude from a surface of the substrate. The depletion barrier layer may be an L-shaped depletion barrier layer and the device may further include a device isolation layer disposed at a predetermined portion of the substrate through the source/drain layer and the depletion barrier layer. The depletion barrier layer and the device isolation layer may be formed of the same material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.