Bipolar transistor
US7397108B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 11, 2005 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | May 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D10/311
Abstract
A monolithically integrated bipolar transistor has an SOI substrate, a collector region in the SOI substrate, a base layer region on top of and in contact with the collector region, and an emitter layer region on top of and in contact with the base layer region, wherein the collector, base layer, and emitter layer regions are provided with separate contact regions. Further, a region of an insulating material, preferably an oxide or nitride, is provided in the base layer region, in the emitter layer region, or between the base and emitter layer regions, wherein the insulating region extends laterally at a fraction of a width of the base and emitter layer regions to reduce an effective width of the bipolar transistor to thereby eliminate any base push out effects that would otherwise occur.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.