Ferroelectric memory device having ferroelectric capacitor
US7397687B2 · kind B2 · utility
3Cited by
16References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2006 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | Sep 2, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ferroelectric memory device includes a cell block, a bit line, and a plate line. The cell block includes a ferroelectric capacitor and a transistor switch. The bit line applies a voltage to one electrode of the ferroelectric capacitor. The plate line applies a voltage to the other electrode of the ferroelectric capacitor. In a read operation of data, a first voltage is applied to the plate line. In a write operation of data, a second voltage different from the first voltage is applied to the plate line, and a voltage which is higher or lower than the second voltage is applied to the bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.