Current sensing architecture for high bitline voltage, rail to rail output swing and Vcc noise cancellation
US7397696B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2004 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | Jan 19, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention pertains to a circuit arrangement that, in one example, facilitates reading or determining an amount of current that flows through a memory cell when one or more voltages are applied to the cell. The amount of current resulting from the applied voltages is a function of the amount of charge stored within the cell, among other things, and the amount of stored charge represents information stored within the cell. As such, reading the resulting current allows data stored within the cell to be accessed and retrieved. It will be appreciated however, that use of the circuitry disclosed herein is not limited to memory applications. Rather, it can be used in any application where current sensing is required along with a regulated supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.