Integrated circuit design with cell-based macros
US7401310B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2006 |
| Grant date | Jul 15, 2008 |
| Priority date | — |
| Expiry date | Jul 8, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for designing integrated circuits may include custom designing, at the transistor level, individual cells to be incorporated into cell-based macros. A macro-level function of an integrated circuit's design specification requiring custom, transistor-level design may be identified and custom cells may be designed at the transistor-level to meet the design specification. Custom designed cells may be included in cell-based macros, thus allowing cell-based simulation and verification methodologies and tools to be used on the integrated circuit design. Static timing analysis, circuit extraction and other characteristics may be defined for each custom cell and the timing analysis and circuit extraction for cell-based macros may be defined based on the timing and extraction information for the custom cells included in the macro.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.