Cache memory to support a processor's power mode of operation
US7404043B2 · kind B2 · utility
7Cited by
12References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 6, 2005 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Aug 19, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system, method, and apparatus for a cache memory to support a low power mode of operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.