Parallel copying scheme for creating multiple versions of state information
US7404059B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 7, 2005 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Jun 15, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
State information in a processor is managed using a lookup table that has multiple memory circuits, each with multiple entries. Items of state information belonging to a first state version are stored in a first group of the entries, with each entry in the first group being in a different one of the memory circuits. To create an updated state version, the items of state information are copied in parallel from the first group of entries to a second group of entries, with each entry in the second group is in a different one of the memory circuits. The copy in the second group of the item being updated is then replaced with the updated value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.