Bryon S. Nordquist
29Patents
13h-index
28Co-inventors
77Inventor score
Filing activity: Jun 14, 2002 → Sep 26, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6980209B1 | Method and system for scalable, dataflow-based, programmable processing of graphics data | Physics | 102 | Expired |
| US7447873B1 | Multithreaded SIMD parallel processor with loading of groups of threads | Physics | 83 | Expired |
| US7492368B1 | Apparatus, system, and method for coalescing parallel memory requests | Physics | 68 | Expired |
| US7584342B1 | Parallel data processing systems and methods using cooperative thread arrays and SIMD instruction issue | Physics | 68 | Expired |
| US8074224B1 | Managing state information for a multi-threaded processor | Physics | 63 | Active |
| US7594095B1 | Multithreaded SIMD parallel processor with launching of groups of threads | Physics | 50 | Expired |
| US8087029B1 | Thread-type-based load balancing in a multithreaded processor | Physics | 44 | Active |
| US8108872B1 | Thread-type-based resource allocation in a multithreaded processor | Emerging Cross-Sectional Technologies | 26 | Active |
| US8429656B1 | Thread count throttling for efficient resource utilization | Emerging Cross-Sectional Technologies | 25 | Active |
| US7477260B1 | On-the-fly reordering of multi-cycle data transfers | Physics | 23 | Active |
| US7728841B1 | Coherent shader output for multiple targets | Physics | 16 | Active |
| US8081184B1 | Pixel shader program thread assembly | Physics | 16 | Active |
| US7533237B1 | Off-chip memory allocation for a unified shader | Physics | 15 | Active |
| US7739473B1 | Off-chip memory allocation for a unified shader | Physics | 13 | Active |
| US7865894B1 | Distributing processing tasks within a processor | Physics | 11 | Active |
| US8095829B1 | Soldier-on mode to control processor error handling behavior | Physics | 11 | Active |
| US9348762B2 | Technique for accessing content-addressable memory | Physics | 9 | Active |
| US7404056B1 | Virtual copying scheme for creating multiple versions of state information | Physics | 8 | Active |
| US7533236B1 | Off-chip out of order memory allocation for a unified shader | Physics | 8 | Active |
| US7404059B1 | Parallel copying scheme for creating multiple versions of state information | Physics | 7 | Active |
| US8407443B1 | Off-chip out of order memory allocation for a unified shader | Physics | 5 | Active |
| US7593971B1 | Configurable state table for managing multiple versions of state information | Physics | 4 | Active |
| US7948495B1 | Linking texture headers and texture samplers | Physics | 4 | Active |
| US7489315B1 | Pixel stream assembly for raster operations | Physics | 3 | Active |
| US7522171B1 | On-the-fly reordering of 32-bit per component texture images in a multi-cycle data transfer | Physics | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.