Patent · US Active

System and apparatus for early fixed latency subtractive decoding

US7406553B2 · kind B2 · utility

17Cited by
14References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 12, 2007
Grant dateJul 29, 2008
Priority date
Expiry dateApr 12, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4217
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods for early fixed latency subtractive decoding are disclosed. The subtractive decoding device speculatively acknowledges a bus transaction within a fixed time period that is the same as the time period for positive decoding. Pipelining of a new bus transaction may therefore be accomplished each new time period. A bus transaction may be retried if no acknowledgement occurs within the fixed time period.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.