Field effect transistor and method for manufacturing the same
US7407845B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2005 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | Jan 24, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6213
Abstract
In one embodiment, a semiconductor device includes a semiconductor substrate having a lower layer and an upper layer overlying the lower layer. The upper layer is arranged and structured to form first and second active regions that are spaced apart from each other and protrude from an upper surface of the lower layer. A third active region of a bridge shape is distanced vertically from the upper surface of the lower layer and connects the first and second active regions. The device further includes a gate electrode, which is formed with a gate insulation layer surrounding the third active region, so that the third active region functions as a channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.