Automatic test configuration generation facilitating repair of programmable circuits
US7409669B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2003 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | Feb 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318516
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Techniques are provided that control the generation of test routes to improve the ability of a test system to isolate defects on programmable circuits. A test generator creates test routes that test the horizontal resources. In these test routes, the inputs of each circuit element are only connected to other circuit elements in the same row. Test routes are also generated to test the vertical resources. Each of theses test routes is allowed to make only one transition from between two different rows of circuit elements. The configuration generator includes a post processor that ensures all source drivers in the test routes connect to at least two sinks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.