Patent · US Expired

Interconnections for flip-chip using lead-free solders and having reaction barrier layers

US7410833B2 · kind B2 · utility

6Cited by
13References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 31, 2004
Grant dateAug 12, 2008
Priority date
Expiry dateNov 28, 2024

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/30107
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.