Opto-thermal annealing methods for forming metal gate and fully silicided gate field effect transistors
US7410852B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2006 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Feb 21, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An opto-thermal annealing method for forming a field effect transistor uses a reflective metal gate so that electrical properties of the metal gate and also interface between the metal gate and a gate dielectric are not compromised when opto-thermal annealing a source/drain region adjacent the metal gate. Another opto-thermal annealing method may be used for simultaneously opto-thermally annealing: (1) a silicon layer and a silicide forming metal layer to form a fully silicided gate; and (2) a source/drain region to form an annealed source/drain region. An additional opto-thermal annealing method may use a thermal insulator layer in conjunction with a thermal absorber layer to selectively opto-thermally anneal a silicon layer and a silicide forming metal layer to form a fully silicide gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.