Method of manufacturing a semiconductor device
US7410869B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2006 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Jul 10, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of manufacturing a semiconductor device such as a flash memory device, an insulating pattern having an opening is formed to partially expose a surface of a substrate. A first silicon layer is formed on the exposed surface portion of the substrate and the insulating pattern. The first silicon layer has an opened seam overlying the previously exposed portion of the substrate. A heat treatment on the substrate is performed at a temperature sufficient to induce silicon migration so as to cause the opened seam to be closed via the silicon migration. A second silicon layer is then formed on the first silicon layer. Thus, surface profile of a floating gate electrode obtained from the first and second silicon layers may be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.