Young-Sub You
23Patents
5h-index
50Co-inventors
68Inventor score
Filing activity: Feb 6, 2003 → Dec 6, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6797561B2 | Method of fabricating a capacitor of a semiconductor device | Electricity | 21 | Expired |
| US7741222B2 | Etch stop structure and method of manufacture, and semiconductor device and method of manufacture | Electricity | 13 | Active |
| US7563677B2 | Recessed gate electrode and method of forming the same and semiconductor device having the recessed gate electrode and method of manufacturing the same | Electricity | 8 | Active |
| US8970039B2 | Integrated circuit devices including electrode support structures and methods of fabricating the same | Electricity | 8 | Active |
| US7077929B2 | Apparatus for manufacturing a semiconductor device | Electricity | 7 | Expired |
| US6706613B2 | Methods for manufacturing stacked gates including oxide/nitride/oxide (ONO) interlayer dielectrics using pre-annealing and/or post-annealing in nitrogen | Electricity | 4 | Expired |
| US8241979B2 | Method of forming a vertical diode and method of manufacturing a semiconductor device using the same | Electricity | 4 | Active |
| US7041558B2 | Floating gate memory device and method of manufacturing the same | Emerging Cross-Sectional Technologies | 4 | Expired |
| US7803679B2 | Method of forming a vertical diode and method of manufacturing a semiconductor device using the same | Electricity | 4 | Active |
| US7410869B2 | Method of manufacturing a semiconductor device | Electricity | 3 | Active |
| US7736963B2 | Method of forming a gate structure for a semiconductor device and method of forming a cell gate structure for a non-volatile memory device | Electricity | 3 | Active |
| US7902059B2 | Methods of forming void-free layers in openings of semiconductor substrates | Electricity | 3 | Active |
| US7524747B2 | Floating gate memory device and method of manufacturing the same | Emerging Cross-Sectional Technologies | 3 | Expired |
| US8043974B2 | Semiconductor wet etchant and method of forming interconnection structure using the same | Electricity | 3 | Active |
| US7223657B2 | Methods of fabricating flash memory devices with floating gates that have reduced seams | Electricity | 1 | Expired |
| US7189661B2 | Method of forming silicon oxynitride layer in semiconductor device and apparatus of forming the same | Electricity | 1 | Expired |
| US7459364B2 | Methods of forming self-aligned floating gates using multi-etching | Emerging Cross-Sectional Technologies | 1 | Active |
| US6913979B2 | Method of manufacturing a metal oxide semiconductor transistor | Electricity | 1 | Expired |
| US7521375B2 | Method of forming an oxinitride layer | Electricity | 0 | Active |
| US8617950B2 | Method of forming a capacitor and method of manufacturing a semiconductor device using the same | Electricity | 0 | Active |
| US7160776B2 | Methods of forming a gate structure of a non-volatile memory device and apparatus for performing the same | Electricity | 0 | Expired |
| US7629217B2 | Methods of forming void-free layers in openings of semiconductor substrates | Electricity | 0 | Active |
| US7297620B2 | Method of forming an oxide layer including increasing the temperature during oxidation | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.