Method and apparatus for performing integrated global routing and buffer insertion
US7412680B1 · kind B1 · utility
10Cited by
9References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2005 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Dec 2, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for designing a system on an integrated circuit includes synthesizing the system. The system is placed on the integrated circuit. Buffer insertion is performed while selecting new branch points during routing of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.