Mark Bourgeault
26Patents
5h-index
21Co-inventors
69Inventor score
Filing activity: Nov 13, 2002 → Sep 11, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6971083B1 | Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functions | Physics | 67 | Expired |
| US7412680B1 | Method and apparatus for performing integrated global routing and buffer insertion | Physics | 10 | Expired |
| US8504970B1 | Method and apparatus for performing automated timing closure analysis for systems implemented on target devices | Physics | 8 | Active |
| US7676768B1 | Automatic asynchronous signal pipelining | Physics | 8 | Active |
| US9602106B1 | Methods for optimizing circuit performance via configurable clock skews | Electricity | 5 | Active |
| US9584129B1 | Integrated circuit applications using partial reconfiguration | Physics | 5 | Active |
| US7415692B1 | Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functions | Physics | 3 | Active |
| US10374609B1 | Integrated circuit applications using partial reconfiguration | Physics | 3 | Active |
| US9361421B2 | Method and apparatus for placing and routing partial reconfiguration modules | Physics | 3 | Active |
| US10175734B1 | Techniques for adjusting latency of a clock signal to affect supply voltage | Physics | 3 | Active |
| US8356358B2 | Preventing information leakage between components on a programmable chip in the presence of faults | Physics | 2 | Active |
| US8191028B1 | Methods and systems for improving a maximum operating frequency of an integrated circuit during a route phase | Physics | 2 | Active |
| US8671377B2 | Method and apparatus for placement and routing of partial reconfiguration modules | Physics | 2 | Active |
| US11813017B2 | Reusable minimally invasive surgical instrument | Human Necessities | 1 | Active |
| US10037048B1 | Methods for optimizing circuit performance via configurable clock skews | Electricity | 1 | Active |
| US10242146B2 | Method and apparatus for placing and routing partial reconfiguration modules | Physics | 1 | Active |
| US8539414B1 | Automatic asynchronous signal pipelining | Physics | 0 | Active |
| US11507723B2 | Method and apparatus for performing incremental compilation using structural netlist comparison | Physics | 0 | Active |
| US12383330B2 | Reusable minimally invasive surgical instrument | Human Necessities | 0 | Active |
| US10969820B2 | Methods for optimizing circuit performance via configurable clock skews | Electricity | 0 | Active |
| US11507722B2 | Method and apparatus for performing incremental compilation using structural netlist comparison | Physics | 0 | Active |
| US8832627B1 | Automatic asynchronous signal pipelining | Physics | 0 | Active |
| US11381243B2 | Integrated circuit applications using partial reconfiguration | Physics | 0 | Active |
| US10275557B1 | Method and apparatus for performing incremental compilation using structural netlist comparison | Physics | 0 | Active |
| US9183336B1 | Automatic asynchronous signal pipelining | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.