Thin laminate as embedded capacitance material in printed circuit boards
US7413815B2 · kind B2 · utility
6Cited by
10References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 19, 2004 |
| Grant date | Aug 19, 2008 |
| Priority date | — |
| Expiry date | Jun 8, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/31786
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The invention concerns multilayered structures useful for forming capacitors, which may be embedded within printed circuit boards or other microelectronic devices. The multilayered structure comprises a pair of parallel electrically conductive layers separated by a pair of dielectric layers and a central polymerizable layer. Each of the dielectric layers and the central layer may include a filler. Capacitors formed from the multilayered structures of the invention exhibit excellent short circuit resistance as well as excellent void resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.