Method for processing a semiconductor wafer including back side grinding
US7416962B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2002 |
| Grant date | Aug 26, 2008 |
| Priority date | — |
| Expiry date | Jun 3, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for processing the back side of a semiconductor wafer after the wafer has been lapped. The process includes grinding the back side of the wafer to remove wafer material, to substantially eliminate lap damage from the back side of the wafer. The back side of the wafer may then be cleaned, etched, and polished, after which the front side of the wafer is polished. The back side grinding may be accomplished after the lapping without any other step of substantial removal of wafer material. The polishing of the back side of the wafer may be performed with a CMP machine and may produce a specular surface, visually free of damage under haze lamp inspection, with removal of about 0.5 microns of wafer material. After polishing the front side of the wafer, an epitaxial layer may be produced on the front side of the wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.