Semiconductor chip assembly with laterally aligned bumped terminal and filler
US7417314B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2006 |
| Grant date | Aug 26, 2008 |
| Priority date | — |
| Expiry date | Jan 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a filler, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line is adjacent to the bumped terminal and extends laterally beyond the bumped terminal and the filler, and the filler contacts the bumped terminal in a cavity that extends through the bumped terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.