Low pin count reset configuration
US7420401B2 · kind B2 · utility
1Cited by
3References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2006 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Jul 26, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/22
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit is configured with a pin for specifying a reset configuration vector of a circuitry within the integrated circuit. The resistance value of a low cost external resistor coupled to the pin is detected and utilized to identify the configuration. Logic on the integrated circuit detects and utilizes the resistor value to index to a configuration vector in a look-up table. The integrated circuit is then configured in accordance with the indexed configuration vector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.