Sigma-delta modulator and method for sigma-delta modulation
US7420485B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2007 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Mar 23, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/3015
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sigma-delta modulator is supplied with a data word and includes a first and at least one further modulation stage, each having at least two adders. The adders in the first modulation stage process a low-significance component and a delayed more significant component of the data word and provide a result word and a carry at their respective outputs. The adders in the at least one further modulation stage process a low-significance component and a more significant component of the result word and provide a further result word and a carry at their respective outputs. The low-significance component and the more significant component of the result word are provided to the further modulation stages with an unvarying delay. A bit stream is derived from a carry from final instances of the at least two adders in the first modulation stage and in the further modulation stage respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.