Patent · US Active

Memory device and method for transforming between non-power-of-2 levels of multilevel memory cells and 2-level data bits

US7420841B2 · kind B2 · utility

10Cited by

6References

19Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Bernhard Ruf · Sauerlach, DE
Michael Angerbauer · Freutsmoos, DE

Key dates

Filing date	Aug 30, 2006
Grant date	Sep 2, 2008
Priority date	—
Expiry date	Aug 30, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG11C2211/5641
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory device and a method of operating a memory device is disclosed. In one embodiment of the invention, the memory device includes a plurality of multi-level memory cells each having a number m of levels not matching 2n with n being a non-zero integer, and a circuit or device for combining the levels of at least two of the memory cells for write and read operations into a set of combined states and for transforming at least a subset of 2n combinations of the set of combined states into n two-level data bits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.