Semiconductor memory device and method for operating a semiconductor memory device
US7420867B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 9, 2004 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Aug 21, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a semiconductor memory device is disclosed. In one embodiment, the method includes activating a first memory cell sub-array or memory cells of the first memory cell sub-array that are contained in a first set of memory cells, in particular of memory cells positioned in one and the same row or column of the first memory cell sub-array, if one or a plurality of memory cells contained in the first memory cell sub-array or in the first set of memory cells is/are to be accessed. The corresponding memory cell or memory cells are accessed; including leaving the first memory cell sub-array or the memory cells of the first memory cell sub-array that are contained in the first set of memory cells in the activated state if one or a plurality of further memory cells is/are to be accessed which are contained in a second memory cell sub-array of the same memory cell array that comprises the first memory cell sub-array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.