Random cache read using a double memory
US7423915B2 · kind B2 · utility
10Cited by
17References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2006 |
| Grant date | Sep 9, 2008 |
| Priority date | — |
| Expiry date | Sep 30, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/2022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory, such as a Flash memory, is configured to perform a random multi-page read operation. The memory may include a core array of non-volatile memory cells and input lines for receiving an indication of the random multi-page read operation. Further, the memory may include a multi-level volatile memory coupled to the core array that is configured to simultaneously process multiple pages of data from the core array in a pipelined manner. Output lines are coupled to the multi-level volatile memory and output the pages of data from the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.