EEPROM structure with improved data retention utilizing biased metal plate and conductive layer exclusion
US7425741B1 · kind B1 · utility
1Cited by
5References
9Claims
0Family size
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Key dates
| Filing date | Jul 21, 2005 |
| Grant date | Sep 16, 2008 |
| Priority date | — |
| Expiry date | Jul 21, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A biased conductive plate is provided over an NVM cell structure to overcome data retention charge loss due to the presence of dielectric films that are conductive at higher temperatures. The biased conductive plate is preferably formed from the lowest metal layer in the fabrication process flow, but any biased conductive layer can be used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.