Switchable resistive memory with opposite polarity write pulses
US7426128B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 11, 2005 |
| Grant date | Sep 16, 2008 |
| Priority date | — |
| Expiry date | May 27, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A rewriteable nonvolatile memory includes a thin film transistor and a switchable resistor memory element in series. The switchable resistor element decreases resistance when subjected to a set voltage magnitude applied in a first direction, and increases resistance when subjected to a reset voltage magnitude applied in a second direction opposite the first. The memory cell is formed in an array, such as a monolithic three dimensional memory array in which multiple memory levels are formed above a single substrate. The thin film transistor and a switchable resistor memory element are electrically disposed between a data line and a reference line which are parallel. A select line extending perpendicular to the data line and the reference line controls the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.