Method and device for calculating an iterated state for a feedback shift register arrangement
US7426528B2 · kind B2 · utility
5Cited by
6References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 12, 2004 |
| Grant date | Sep 16, 2008 |
| Priority date | — |
| Expiry date | Oct 5, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/70756
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A final state in a shift register arrangement is obtained from an initial state by means of N-fold iteration using an iteration rule prescribed by a characteristic polynomial f(x) of n-th order. To determine the final state, a tap mask which is characteristic of N′ shift register operations is calculated. Using the tap mask, n shift register operations are performed. This produces the n bits of an N′-fold iterated state of the shift register arrangement. Any remaining N-N′ iterations which are needed are performed in another manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.