Method of manufacturing a semiconductor device
US7429513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2004 |
| Grant date | Sep 30, 2008 |
| Priority date | — |
| Expiry date | Jun 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
In the method for manufacturing a semiconductor device (100), which comprises a semiconducting body (1) having a surface (2) with a source region (3) and a drain region (4) defining a channel direction (102) and a channel region (101), a first stack (6) of layers on top of the channel region (101), the first stack (6) comprising, in this order, a tunnel dielectric layer (11), a charge storage layer (10) for storing an electric charge and a control gate layer (9), and a second stack (7) of layers on top of the channel region (101) directly adjacent to the first stack (6) in the channel direction (102), the second stack (7) comprising an access gate layer (14) electrically insulated from the semiconducting body (1) and from the first stack (6), initially a first sacrificial layer (90) is used, which is later replaced by the control gate layer (9). A second sacrificial layer (20) is used to protect the part (82) off the surface (2) adjacent to the second sidewall (81) and opposite to the position (83) of the second stack (7) when providing the access gate layer (14).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.