System and method for avoiding attempts to access a defective portion of memory
US7430145B2 · kind B2 · utility
22Cited by
4References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2005 |
| Grant date | Sep 30, 2008 |
| Priority date | — |
| Expiry date | Sep 16, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method comprises detecting a defect in a portion of memory. The method further comprises designating the portion of memory as defective, and avoiding attempts to access the portion of memory designated as defective.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.