Integrated micro-channels for 3D through silicon architectures
US7432592B2 · kind B2 · utility
267Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2005 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Oct 13, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the present invention include apparatuses and methods relating to integrated micro-channels for removing heat from 3D through silicon architectures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.