Sequence-independent power-on reset for multi-voltage circuits
US7432748B2 · kind B2 · utility
5Cited by
7References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2006 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Nov 4, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/24
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power-on reset (“POR”) methodology and circuit for an electronic circuit using multiple supply voltage domains asserts a reset signal upon ramp up of the first supply voltage signal, maintains the reset signal until all of the supply voltage signals have ramped up, and de-asserts the reset signal after all of the supply voltage signals have ramped up. Practical embodiments of the POR circuit include a control circuit that reduces static and/or dynamic current leakage associated with the operation of the POR circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.