Patent · US Active

Memory transistor and memory unit with asymmetrical pocket doping region

US7433232B2 · kind B2 · utility

5Cited by

5References

35Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Christian Geissler · Teugn, DE
Franz Schuler · Kreßbronn, DE
Danny Pak-Chum Shum · Poughkeepsie, US

Key dates

Filing date	May 10, 2006
Grant date	Oct 7, 2008
Priority date	—
Expiry date	Aug 18, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/0416
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated memory transistor and a memory unit including a plurality of integrated memory transistors is disclosed. Generally, the integrated memory transistor includes an electron source, a channel region, a control region, a charge storage region, a source-side pocket doping region, and a drain-side pocket doping region. The electron source is operable to transport electrons to the channel region when the integrated memory transistor operates in a read mode. Further, the electron source includes a drain terminal region and a source terminal region. The channel region is arranged between the drain terminal region and source terminal region. The charge storage region is arranged between the control region and the channel region. The source-side doping region is arranged nearer to the source terminal region than to the drain terminal region. The drain-side pocket doping region is arranged asymmetrical to the source-side pocket doping region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.