Method and circuit for reading fuse cells in a nonvolatile memory during power-up
US7433247B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2005 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Sep 26, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0407
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit are described for ensuring a properly operational power-up read of fuse cells in a nonvolatile memory by selecting predefined data for loading in a portion of a fuse memory and matching the reading of the predefined data during power-up with the predefined data, thereby indicating a proper power-up read of fuse cells. The fuse memory is partitioned into a first section of fuse cells for conducting a pre-check procedure to match a first predefined data being read against the first predefined data, a second section for reading main fuse cells to match with a second predefined data being read against the second predefined data, and a third section of fuse cells for conducting a post-check procedure to match a third predefined data being read against the third predefined data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.