Semiconductor memory and method of storing configuration data
US7434092B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2005 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Jul 9, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2229/723
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Redundantly repaired semiconductor memory and method in which the configuration data for the memory is stored in an area of the main memory array which is known to be free of bad bits, along with a signature code which serves as a pointer and verifies the validity of the configuration data. In one disclosed embodiment, the data is stored in a configuration memory which is divided into a plurality of areas of equal size and known starting addresses. The number of areas is greater than the number of permitted repairs, and the areas which do not contain defects are available for storing configuration data including device settings, repair information, and the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.