Integrated micro channels and manifold/plenum using separate silicon or low-cost polycrystalline silicon
US7435623B2 · kind B2 · utility
28Cited by
12References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2005 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Apr 14, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for cooling an electronics chip with a cooling plate having integrated micro channels and manifold/plenum made in separate single-crystal silicon or low-cost polycrystalline silicon. Forming the microchannels in the cooling plate is more economical than forming the microchannels directly into the back of the chip being cooled. In some embodiments, the microchannels are high-aspect-ratio grooves formed (e.g., by etching) into a polycrystalline silicon cooling base, which is then attached to a cover (to contain the cooling fluid in the grooves) and to the back of the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.