Method of manufacturing a circuit substrate and method of manufacturing an electronic parts packaging structure
US7435680B2 · kind B2 · utility
29Cited by
3References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2005 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Nov 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0723
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a circuit substrate of the present invention, includes the steps of forming an n-layered (n is an integer of 1 or more) wiring layer connected electrically to a metal plate on the metal plate, forming an electroplating layer on a connection pad portion of an uppermost wiring layer of the n-layered wiring layer by an electroplating utilizing the metal plate and the wiring layer as a plating power-supply path, and removing the metal plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.