Concept of compensating for piezo influences on integrated circuitry
US7437260B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2005 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Feb 17, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor chip includes a first functional element having a first electronic functional-element parameter exhibiting a dependence relating to the mechanical stress present in the semiconductor circuit chip, and being configured to provide a first output signal, a second functional element having a second electronic functional-element parameter exhibiting a dependence in relation to the mechanical stress present in the semiconductor circuit chip, and being configured to provide a second output signal in dependence on the second electronic functional-element parameter and the mechanical stress, and a combination means for combining the first and second output signals to obtain a resulting output signal exhibiting a predefined dependence on the mechanical stress present in the semiconductor circuit chip, the first and second functional elements being integrated on the semiconductor circuit chip and arranged, geometrically, such that that the first and second functional-element stress influence functions are identical within a tolerance range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.