Method for predicate-based compositional minimization in a verification environment
US7437690B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2005 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Nov 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for performing verification includes importing a design netlist containing one or more components and computing one or more output functions for the one or more components. One or more output equivalent state sets are generated from the one or more output functions and one or more next-state functions for the one or more components are identified. One or more image equivalent state sets for the one or more next-state functions are produced and one or more output-and-image equivalent state sets are classified for the one or more image equivalent state sets and the one or more output equivalent state sets. One or more input representatives of the one or more equivalent input sets are selected and an input map is formed from the one or more input representatives. The input map is synthesized and injected back into the netlist to generate a modified netlist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.