Method and program product for protecting information in EDA tool design views
US7437698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2005 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Aug 27, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Sensitive circuit design information in HDL Interface Logic Models such as module names and structures within certain EDA tool design views is eliminated by substituting selected instance and net names with unrelated unique identifiers prior to transferring the design views as part of a simulation model of a circuit design, and consequently avoiding unauthorized use of that information. The method for encoding signal names in different design views of an IC design includes providing a list of names contained in a plurality of design databases, changing each name in the list of names to a protected name, and substituting each changed name with an associated protected name in each design view database.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.