Field plated resistor with enhanced routing area thereover
US7439146B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2000 |
| Grant date | Oct 21, 2008 |
| Priority date | — |
| Expiry date | Oct 12, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/43
Abstract
An integrated circuit includes a field plated resistor having enhanced area thereover for routing metal conductors, formed in the same layer of metal as forms contacts to the resistor, is fabricated by a sequence of processing steps. A resistor having a resistor body and a contact region at each end thereof is formed in an active region of a semiconductor substrate. A first layer of insulative material is formed over the resistor and a window is created through the first layer of insulative material to the resistor body to form a first contact region. A layer of polysilicon is formed over the first insulative layer to define a field plate, the polysilicon field plate being contiguous with the first contact region of the resistor and extending over the resistor body to substantially to the other contact region, as layout, design, and fabrication rules permit. A second insulative layer is formed over the polysilicon layer. Windows are created in the second insulative layer to provide access to the polysilicon field plate and the second contact region. A metal layer is applied and unwanted metal is etched away to provide conductors over the polysilicon field plate of a field plated re…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.