Patent · US Active

Multi-transistor memory cells

US7440334B2 · kind B2 · utility

10Cited by

12References

32Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Hans-Joachim Barth · Munich, DE
Alexander Olbrich · Höhenkirchen-Siegertsbrunn, DE
Martin Ostermayr · Straubing, DE
Klaus Schrüfer · Baldham, DE

Key dates

Filing date	Mar 23, 2006
Grant date	Oct 21, 2008
Priority date	—
Expiry date	Aug 26, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH10B12/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory cell having three transistors and a capacitor having metallic electrodes is described. Multiple memory cells may be arranged in a memory unit or array. Collective electrodes may be used in a space-saving embodiment of the capacitor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.