Methods for designing integrated circuits
US7441208B1 · kind B1 · utility
2Cited by
7References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2005 |
| Grant date | Oct 21, 2008 |
| Priority date | — |
| Expiry date | Sep 23, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The process of designing an integrated circuit (“IC”) to implement a generalized circuit design includes a signoff between a front-end part of the process and a back-end part of the process. This signoff preferably takes place after at least some global routing has been done for the IC implementation, but before all final detailed routing is done for that implementation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.