On-the-fly RTL instructor for advanced DFT and design closure
US7441210B2 · kind B2 · utility
10Cited by
0References
20Claims
0Family size
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Key dates
| Filing date | Oct 11, 2005 |
| Grant date | Oct 21, 2008 |
| Priority date | — |
| Expiry date | Nov 30, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for developing a circuit design is disclosed. The method generally includes the steps of (A) editing a file for a circuit design based on a plurality of edits received from a designer, the file containing a code written in a hardware description language, (B) characterizing the code in the file while the designer is editing the code to generate a plurality of characterization results and (C) generating a plurality of suggestions to the designer to modify the code based on a comparison of a plurality of goals for the circuit design and the characterization results.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.